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63 lines
1.6 KiB
63 lines
1.6 KiB
11 years ago
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From b434c5aa38e2db0fff9fa39c6e47cc9d13afe8e1 Mon Sep 17 00:00:00 2001
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From: arokux <arokux@gmail.com>
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Date: Thu, 19 Sep 2013 21:36:10 +0200
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Subject: [PATCH] ARM: sun7i: dt: Add USB EHCI bindings
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---
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arch/arm/boot/dts/sun7i-a20.dtsi | 33 +++++++++++++++++++++++++++++++++
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1 file changed, 33 insertions(+)
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diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
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index 4fe484c..b4e4a5a 100644
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--- a/arch/arm/boot/dts/sun7i-a20.dtsi
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+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
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@@ -16,6 +16,11 @@
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/ {
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interrupt-parent = <&gic>;
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+ aliases {
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+ ehci1 = &ehci0;
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+ ehci2 = &ehci1;
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+ };
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+
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@@ -434,5 +439,33 @@
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#interrupt-cells = <3>;
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interrupts = <1 9 0xf04>;
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};
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+
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+ usb_rst: reset@0x01c200cc {
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+ #reset-cells = <1>;
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+ compatible = "allwinner,sun4i-clock-reset";
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+ reg = <0x01c200cc 0x4>;
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+ };
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+
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+ ehci0: ehci0@0x01c14000 {
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+ compatible = "allwinner,sunxi-ehci";
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+ reg = <0x01c14000 0x400 0x01c14800 0x4 0x01c13404 0x4>;
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+ interrupts = <0 39 1>;
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+ resets = <&usb_rst 1>;
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+ reset-names = "ehci_reset";
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+ clocks = <&usb 8>, <&ahb_gates 1>;
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+ clock-names = "usb_phy", "ahb_ehci";
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+ status = "disabled";
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+ };
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+
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+ ehci1: ehci1@0x01c1c000 {
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+ compatible = "allwinner,sunxi-ehci";
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+ reg = <0x01c1c000 0x400 0x01c1c800 0x4 0x01c13404 0x4>;
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+ interrupts = <0 40 1>;
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+ resets = <&usb_rst 2>;
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+ reset-names = "ehci_reset";
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+ clocks = <&usb 8>, <&ahb_gates 3>;
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+ clock-names = "usb_phy", "ahb_ehci";
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+ status = "disabled";
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+ };
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};
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};
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--
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1.8.4
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