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66 lines
2.0 KiB
66 lines
2.0 KiB
12 years ago
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From 281db30007b5836ce8acf5a45160fde6b176eda4 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Fri, 15 Feb 2013 13:38:24 +0000
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Subject: [PATCH] MIPS: ath79: add USB controller registration code for the
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QCA955X SoCs
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commit 82c46840ae6bd8a147c59cd51f636d913989324a upstream.
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Register platfom devices for the built-in USB
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controllers of the SoCs.
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Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
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Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
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Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4952/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ath79/dev-usb.c | 15 +++++++++++++++
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arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 3 +++
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2 files changed, 18 insertions(+)
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--- a/arch/mips/ath79/dev-usb.c
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+++ b/arch/mips/ath79/dev-usb.c
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@@ -208,6 +208,19 @@ static void __init ar934x_usb_setup(void
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&ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
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}
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+static void __init qca955x_usb_setup(void)
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+{
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+ ath79_usb_register("ehci-platform", 0,
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+ QCA955X_EHCI0_BASE, QCA955X_EHCI_SIZE,
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+ ATH79_IP3_IRQ(0),
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+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
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+
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+ ath79_usb_register("ehci-platform", 1,
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+ QCA955X_EHCI1_BASE, QCA955X_EHCI_SIZE,
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+ ATH79_IP3_IRQ(1),
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+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
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+}
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+
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void __init ath79_register_usb(void)
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{
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if (soc_is_ar71xx())
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@@ -222,6 +235,8 @@ void __init ath79_register_usb(void)
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ar933x_usb_setup();
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else if (soc_is_ar934x())
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ar934x_usb_setup();
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+ else if (soc_is_qca955x())
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+ qca955x_usb_setup();
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else
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BUG();
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}
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--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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@@ -109,6 +109,9 @@
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#define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
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#define QCA955X_WMAC_SIZE 0x20000
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+#define QCA955X_EHCI0_BASE 0x1b000000
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+#define QCA955X_EHCI1_BASE 0x1b400000
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+#define QCA955X_EHCI_SIZE 0x1000
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/*
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* DDR_CTRL block
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